Hello RISC-V !

ajo Dec 15, 2022 0 Comments

In the following posts, I will document the environment preparation for working with the RISC-V architecture from the RISC-V association. RISC-V is an open ISA, applying that any vendor can implement.

As the industry is waking up around this architecture, I thought it was a good opportunity to get familiar with it; hopefully, the OpenSource principles will help this architecture thrive.

First things first, we need a compiler and toolchain, and for the lack of hardware a simulator. Installing the RISC-V toolchain in brew will help us with that, for OSX we can use the brew tap for the RISC-V to make things easier:

$ brew tap riscv-software-src/riscv
$ brew install riscv-tools

You could also build your own toolchain manually, but that’s tedious; it’s been a long time without doing that 🙂 .. http://osblog.stephenmarz.com/ch0.old.html

AI at the Edge with MicroShift

ajo May 18, 2022 0 Comments

Last January, with my colleague Ricardo Noriega, we presented how a compact OpenShift distribution like MicroShift could leverage AI models at the Edge.

At that time MicroShift was a project being incubated as part of the work in Emerging Technologies at Red Hat. Today MicroShift is part of Red Hat’s Device Edge offering, based on OpenShift 4.12 as a preview for customers.

You can find the code for this demo here: https://github.com/redhat-et/AI-for-edge-microshift-demo, including the code for the ESP32-based cameras and the deployment manifests for MicroShift.

Later on, we updated this demo for the OpenShift Commons 2022 @ Valencia.

It was a pleasure, as usual, to co-present with my colleague Ricardo.